Method and apparatus for channel encoding and decoding in a communication system using low-density-parity-check codes

ABSTRACT

A method and apparatus for encoding and decoding a channel in a communication system using a Low-Density Parity-Check (LDPC) code. The encoding method includes determining a modulation scheme for transmitting a symbol; determining a shortening pattern in consideration of the determined modulation scheme; grouping columns corresponding to an information word in a parity-check matrix of the LDPC code into a plurality of column groups; ordering the column groups; determining a range of a resulting information word desired to be obtained by shortening the information word; based on the range of the resulting information word, performing column group-by-column group shortening on the ordered column groups of the information word, according to the determined shortening pattern; and LDPC-encoding the shortened information word.

PRIORITY

This application claims priority under 35 U.S.C. §119(a) to a KoreanPatent Application filed in the Korean Intellectual Property Office onFeb. 26, 2008 and assigned Serial No. 10-2008-0017279, a Korean PatentApplication filed in the Korean Intellectual Property Office on Mar. 11,2008 and assigned Serial No. 10-2008-0022484, and a Korean PatentApplication filed in the Korean Intellectual Property Office on Mar. 18,2008 and assigned Serial No. 10-2008-0025144, the disclosures of all ofwhich are incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to a communication system usingLow-Density Parity-Check (LDPC) codes, and more particularly, to achannel encoding/decoding apparatus and method for generating LDPC codeshaving various codeword lengths and code rates from an LDPC code givenin a high-order modulation scheme.

2. Description of the Related Art

In wireless communication systems, link performance significantlydecreases due to various noises in the channels, a fading phenomenon,and Inter-Symbol Interference (ISI). Therefore, in order providehigh-speed digital communication systems, which require high datathroughput and reliability, such as the next-generation mobilecommunication, digital broadcasting, and portable internet, it isimportant to develop technologies for overcoming the channel noises,fading, and ISI. Recently, an intensive study of an error-correctingcode has been conducted as a method for increasing communicationreliability by efficiently recovering distorted information.

The LDPC code, i.e., a type of error-correcting code, is generallydefined as a parity-check matrix, and can be represented using abipartite graph, which is referred to as a Tanner graph. The bipartitegraph means that vertexes constituting the graph are divided into twodifferent types, and the LDPC code is represented with the bipartitegraph composed of vertexes, some of which are called variable nodes andthe other of which are called check nodes. The variable nodes areone-to-one mapped to the encoded bits.

FIG. 1 illustrates an example of a parity-check matrix H₁ of the LDPCcode having 4 rows and 8 columns.

Referring to FIG. 1, because the number of columns is 8, theparity-check matrix H₁ is an LDPC code that generates a length-8codeword, and the columns are mapped to 8 encoded bits.

FIG. 2 illustrates a Tanner graph corresponding to the parity-checkmatrix H₁ of FIG. 1.

Referring to FIG. 2, the Tanner graph of the LDPC code includes 8variable nodes x₁ (202), x₂ (204), x₃ (206), x₄ (208), x₅ (210), x₆(212), x₇ (214), and x₈ (216), and 4 check nodes 218, 220, 222, and 224.An i^(th) column and a j^(th) row in the parity-check matrix H₁ of theLDPC code are mapped to a variable node x_(i) and a j^(th) check node,respectively. In addition, a value of 1, i.e., a non-zero value, at thepoint where an i^(th) column and a j^(th) row in the parity-check matrixH₁ of the LDPC code cross each other, indicates that there is an edgebetween the variable node x_(i) and the j^(th) check node on the Tannergraph as illustrated in FIG. 2.

In the Tanner graph of the LDPC code, a degree of the variable node andthe check node indicates the number of edges connected to eachrespective node, and the degree is equal to the number of non-zeroentries in a column or row corresponding to the pertinent node in theparity-check matrix of the LDPC code. For example, in FIG. 2, degrees ofthe variable nodes x₁ (202), x₂ (204), x₃ (206), x₄ (208), x₅ (210), x₆(212), x₇ (214), and x₈ (216) are 4, 3, 3, 3, 2, 2, 2, and 2,respectively, and degrees of check nodes 218, 220, 222, and 224 are 6,5, 5, and 5, respectively. In addition, the numbers of non-zero entriesin the columns of the parity-check matrix H₁ of FIG. 1, which correspondto the variable nodes of FIG. 2, coincide with their degrees 4, 3, 3, 3,2, 2, 2, and 2, respectively, and the numbers of non-zero entries in therows of the parity-check matrix H₁ of FIG. 1, which correspond to thecheck nodes of FIG. 2, coincide with their degrees 6, 5, 5, and 5,respectively.

In order to express degree distribution for the nodes of the LDPC code,a ratio of the number of degree-i variable nodes to the total number ofvariable nodes is defined as f_(i), and a ratio of the number ofdegree-j check nodes to the total number of check nodes is defined asg_(j). For example, for the LDPC code corresponding to FIGS. 1 and 2,f₂= 4/8, f₃=⅜, f₄=⅛, and f_(i)=0 for i≠2, 3, 4; and g₅=¾, g₆=¼, andg_(j)=0 for j≠5, 6. When a length of the LDPC code, i.e., the number ofcolumns, is defined as N, and the number of rows is defined as N/2, thedensity of non-zero entries in the entire parity-check matrix having theabove degree distribution is computed as shown Equation (1).

$\begin{matrix}{\frac{{2f_{2}N} + {3f_{3}N} + {4f_{4}N}}{N \cdot {N/2}} = \frac{5.25}{N}} & (1)\end{matrix}$

In Equation (1), as N increases, the density of 1's in the parity-checkmatrix decreases. Generally, as for the LDPC code, because the codewordlength N is inversely proportional to the density of non-zero entries,the LDPC code with a large N has a very low density of non-zero entries.The term “low-density” in the name of the LDPC code originates from theabove-mentioned relationship.

FIG. 3 schematically illustrates an LDPC code adopted as the standardtechnology in Digital Video Broadcasting-Satellite transmission 2^(nd)generation (DVB-S2), which is one of the European digital broadcastingstandards.

In FIG. 3, N₁ and K₁ denote a codeword length and an information length(or length of information word) of an LDPC code, respectively, and(N₁−K₁) provides a parity length. Further, integers M₁ and q satisfyq=(N₁−K₁)/M₁. Preferably, K₁/M₁ is an integer.

Referring to FIG. 3, a structure of a parity part, i.e., K₁ ^(th) columnthrough (N₁−1)^(th) column, in the parity-check matrix, has a dualdiagonal shape. Therefore, as for degree distribution over columnscorresponding to the parity part, all columns have a degree of 2, exceptfor the last column having a degree of 1.

In the parity-check matrix, an information part, i.e., 0^(th) columnthrough (K₁−1)^(th) column, is created using the following rules.

Rule 1: A total of K₁/M₁ column groups is generated by grouping K₁columns corresponding to the information word in the parity-check matrixinto multiple groups each including M₁ columns. A method for formingcolumns belonging to each column group follows Rule 2 below.

Rule 2: First, positions of 1's in each 0^(th) column in i^(th) columngroups (where i=1, . . . ,K₁/M₁) are determined. When a degree of a0^(th) column in each i^(th) column group is denoted by D_(i), ifpositions of rows with 1 are assumed to be R_(i,0) ⁽¹⁾,R_(i,0) ⁽²⁾, . .. ,R_(i,0) ^(D) ^(i) ⁾, positions R_(i,j) ^((k))(k=1,2, . . . ,D_(i)) ofrows with 1 are defined as shown in Equation (2), in a j^(th) column(where j=1,2, . . . ,M₁−1) in an i^(th) column group.

R _(i,j) ^((k)) =R _(i,(j−1)) ^((k)) +q mod(N ₁ −K ₁),

k=1,2, . . . ,D _(i) , i=1, . . . ,K ₁ /M ₁ , j=1, . . . ,M ₁−1   (2)

According to the above rules, it can be appreciated that degrees ofcolumns belonging to an i^(th) column group are all equal to D_(i). Fora better understanding of a structure of a DVB-S2 LDPC code that storesinformation on the parity-check matrix according to the above rules, thefollowing more detailed example will be given.

As a detailed example, for N₁=30, K₁=15, M₁=5, and q=3, three sequencesfor the information on the positions of rows with 1 for 0^(th) columnsin 3 column groups can be expressed as follows. Herein, these sequencesare referred to as “weight-1 position sequences.”

R _(1,0) ⁽¹⁾=0, R _(1,0) ⁽²⁾=1, R _(1,0) ⁽³⁾=2,

R _(2,0) ⁽¹⁾=0, R _(2,0) ⁽²⁾=11, R _(2,0) ⁽³⁾=13,

R _(3,0) ⁽¹⁾=0, R _(3,0) ⁽²⁾=10, R _(3,0) ⁽³⁾=14.

Regarding the weight-1 position sequence for 0 ^(th) columns in eachcolumn group, only the corresponding position sequences can be expressedas follows for each column group. For example:

0 1 2

0 11 13

0 10 14.

That is, the i^(th) weight-1 position sequence in the i^(th) linesequentially represents the information on the positions of rows with 1for the i^(th) column group.

It is possible to generate an LDPC code having the same concept as thatof a DVB-S2 LDPC code illustrated FIG. 4, by forming a parity-checkmatrix using the information corresponding to the detailed example, andRules 1 and 2.

It is known that the DVB-S2 LDPC code designed in accordance with Rules1 and 2 can be efficiently encoded using the structural shape.Respective steps in a process of performing LDPC encoding using theDVB-S2 based parity-check matrix will be described below by way ofexample.

In the following description, as a detailed example, a DVB-S2 LDPC codewith N₁=16200, K₁=10800, M₁=360, and q=15 undergoes an encoding process.For convenience, information bits having a length K₁ are represented as(i₀,i₁, . . . ,i_(K) ₁ ⁻¹), and parity bits having a length (N₁−K₁) areexpressed as (p₀,p₁, . . . ,p_(N) ₁ _(−K) ₁ ⁻¹).

Step 1: An LDPC encoder initializes parity bits as follows:

p₀=p₁= . . . =p_(N) ₁ _(−K) ₁ ⁻¹=0

Step 2: The LDPC encoder reads information on rows where a 1 is locatedin a column group from a 0^(th) weight-1 position sequence out of thestored sequences indicating the parity-check matrix.

0 2084 1613 1548 1286 1460 3196 4297 2481 3369 3451 4620 2622

R _(1,0) ⁽¹⁾=0, R _(1,0) ⁽²⁾=2048, R _(1,0) ⁽³⁾=1613, R _(1,0) ⁽⁴⁾=1548,R _(1,0) ⁽⁵⁾=1286,

R _(1,0) ⁽⁶⁾=1460, R _(1,0) ⁽⁷⁾=3196, R _(1,0) ⁽⁸⁾=4297, R _(1,0)⁽⁹⁾=2481, R _(1,0) ⁽¹⁰⁾=3369,

R _(1,0) ⁽¹¹⁾=3451, R _(1,0) ⁽¹²⁾=4620, R _(1,0) ⁽¹³⁾=2622.

The LDPC encoder updates particular parity bits p_(x) in accordance withEquation (3), using the read information and the first information biti₀. Herein, x is a value of R_(1,0) ^((k)) for k=1, 2, . . . ,13.

p₀=p₀⊕i₀, p₂₀₈₄=p₂₀₆₄⊕i₀, p₁₆₁₃=p₁₆₁₃⊕i₀,

p₁₅₄₈=p₁₅₄₈⊕i₀, p₁₂₈₆=p₁₂₈₆⊕i₀, p₁₄₆₀=p₁₄₆₀⊕i₀,

p₃₁₉₆=p₃₁₉₆⊕i₀, p₄₂₉₇=p₄₂₉₇⊕i₀, p₂₄₈₁=p₂₄₈₁⊕i₀,   (3)

p₃₃₆₉=p_(3369l ⊕i) ₀, p₃₄₅₁=p₃₄₅₁⊕i₀, p₄₆₂₀⊕i₀,

p₂₆₂₂=p₂₆₂₂⊕i₀

In Equation (3), p_(x)=p_(x)⊕i₀ can also be expressed as p_(x)←p_(x)⊕i₀,and ⊕ represents binary addition.

Step 3: The LDPC encoder determines a value of Equation (4) for the next359 information bits i_(m) (where m=1, 2, . . . , 359) after i₀.

{x+(m mod M ₁)×q}mod(N ₁ −K ₁), M ₁=360, m=1,2, . . . ,359   (4)

In Equation (4), x is a value of R_(1,0) ^((k)) for k=1,2, . . . ,13. Itshould be noted that Equation (4) has the same concept as Equation (2).

Next, the LDPC encoder performs an operation similar to Equation (3)using the values found in Equation (4). That is, the LDPC encoderupdates parity bits P_({x+(m mod M) ₁ _()×q}mod(N) ₁ _(−K) ₁ ₎ fori_(m). For example, for m=1, i.e., for i₁, the LDPC encoder updatesparity bits p_((x+q)mod(N) ₁−K₁) as defined in Equation (5).

p₁₅=p₁₅⊕i₁, p₂₀₉₉=p₂₀₉₉⊕i₁, p₁₆₂₈=p₁₆₂₈⊕i₁,

p₁₅₆₃=p₁₅₆₃⊕i₁, p₁₃₀₁=p₁₃₀₁⊕i₁, p₁₄₇₅=p₁₄₇₅⊕i₁,

p₃₂₁₁=p₃₂₁₁⊕i₁, p₄₃₁₂=p₄₃₁₂⊕i₁, p₂₄₉₆=p₂₄₉₆⊕i₁,   (5)

p₃₃₈₄=p₃₃₈₄⊕i₁, p₃₄₆₆=p₃₄₆₆⊕i₁, p₄₆₃₅=p₄₆₃₅⊕i₁,

p₂₆₃₇=p₂₆₃₇⊕i₁

In Equation (5), q=15. The LDPC encoder performs the above process form=1, 2, . . . , 359, in the same manner as described above.

Step 4: As in Step 2, the LDPC encoder reads information of the 1^(st)weight-1 position sequence R_(2,0) ^((k)) (k=1, 2, . . . , 13) for a361^(st) information bit i₃₆₀, and updates a particular p_(x), where xis R_(2,0) ^((k)). The LDPC encoder updates p_({x+(m mod M) ₁_()×q}mod(N) ₁ _(−K) ₁ ₎, m=361,362, . . . ,719 by similarly applyingEquation (4) to the next 359 information bits i₃₆₁, i₃₆₂, . . . , i₇₁₉after i₃₆₀.

Step 5: The LDPC encoder repeats Steps 2, 3, and 4 for all groups eachhaving 360 information bits.

Step 6: The LDPC encoder finally determines parity bits using Equation(6).

p _(i) =p _(i) ⊕p _(i−1) , i=1,2, . . . ,N ₁ −K ₁−1   (6)

The parity bits p_(i) of Equation (6) have undergone LDPC encoding.

As described above, DVB-S2 performs encoding as described in Steps 1 to6.

In order to apply the LDPC code to the actual communication system, theLDPC code should be designed to be suitable for the data rate requiredin the communication system. Particularly, LDPC codes having variouscodeword lengths are needed to support various data rates according tothe system requirements in an adaptive communication system employingHybrid Automatic Retransmission reqQuest (HARQ) and Adaptive Modulationand Coding (AMC), and also in a communication system supporting variousbroadcast services.

However, as described above, the LDPC code used in the DVB-S2 system hasonly two types of codeword lengths due to its limited use, and each typeof the LDPC code uses an independent parity-check matrix. Accordingly,there is a long-felt need in the art for a method for supporting variouscodeword lengths to increase extendibility and flexibility of thesystem. Particularly, in the DVB-S2 system, transmission of data havingseveral hundreds to thousands of bits is needed for transmittingsignaling information. However, because only 16200 and 64800 areavailable for a length of the DVB-S2 LDPC code, there is a still a needfor support of various codeword lengths. However, because storingindependent parity-check matrixes for respective codeword lengths of theLDPC code may reduce memory efficiency, there is also a need for ascheme capable of efficiently supporting various codeword lengths fromthe existing parity-check matrix, without requiring a new parity-checkmatrix.

It is noted that reliabilities of bits included in high-order modulationsymbols are different when high-order modulation is used in thecommunication system requiring an LDPC code with various codewordlengths, unlike when the high-order modulation is applied in thecommunication system employing only Binary Phase Shift Keying (BPSK) orQuadrature Phase Shift Keying (QPSK).

In order to demonstrate the reliability difference in high-ordermodulation, a description will now be made below as to signalconstellations for Quadrature Amplitude Modulation (QAM), which ishigh-order modulation commonly used in communication systems. AQAM-modulated symbol includes a real part and an imaginary part, andvarious modulation symbols can be generated by differentiatingmagnitudes and signs of their real parts and imaginary parts. QAM willbe described together with QPSK modulation in order to more clearlyprovide the details of QAM characteristics.

FIG. 5A schematically illustrates a signal constellation for aconventional QPSK modulation.

Referring to FIG. 5A, y₀ determines a sign of a real part while y₁determines a sign of an imaginary part. That is, a sign of the real partis plus (+) for y₀=0, and minus (−) for y₀=1. Also, a sign of theimaginary part is plus (+) for y₁=0, and minus (−) for y₁=1. Because y₀and y₁ are equal in error occurrence probability, as they are signindication bits that respectively indicate signs of the real part andthe imaginary part, reliabilities of (y₀, y₁) bits corresponding to onemodulation signal are equal in QPSK modulation. For y_(0,q) and y_(1,q),the second subscript index q indicates a q^(th) output of bits includedin a modulation signal.

FIG. 5B schematically illustrating a signal constellation for aconventional 16-QAM modulation.

Referring to FIG. 5B, (y₀, y₁, y₂, y₃) correspond to bits of onemodulation signal. More specifically, bits y₀ and y₂ determine a signand a magnitude of the real part, respectively, while bits y₁ and y₃determine a sign and a magnitude of the imaginary part, respectively.That is, y₀ and y₁ determine signs of the real part and imaginary partof the modulation signal, while y₂ and y₃ determine magnitudes of thereal part and imaginary part of the modulation signal. Becausedistinguishing a sign of a modulated signal is easier thandistinguishing a magnitude of the modulated signal, y₂ and y₃ are higherin error occurrence probability than y₀ and y₁. Therefore, in terms ofnon-error occurrence probabilities (i.e., reliabilities) of the bits,y₀=y₁>y₂=y₃. That is, bits (y₀, y₁, y₂, y₃), which are included in a QAMmodulation signal, unlike those of a QPSK modulation signal, havedifferent reliabilities.

In 16-QAM modulation, among 4 bits constituting a signal, 2 bitsdetermine signs of the real part and imaginary part of the signal andthe remaining 2 bits only need to determine magnitudes of the real partand imaginary part of the signal. Thus, orders of (y₀, y₁, y₂, y₃) and arole of each bit are subject to change.

FIG. 5C schematically illustrates a signal constellation for aconventional 64-QAM modulation.

From among (y₀, y₁, y₂, y₃, y₄, y₅), which correspond to bits of onemodulation signal, bits y₀, y₂, and y₄ determine a magnitude and a signof the real part, and y₁, y₃, and y₅ determine a magnitude and a sign ofthe imaginary part. Here, y₀ and y₁ determine signs of the real part andthe imaginary part, respectively, and a combination of y₂ and y₄ and acombination of y₃ and y₅ determine magnitudes of the real part and theimaginary part, respectively. As described above, because distinguishingsigns of a modulated signal is easier than distinguishing magnitudes ofthe modulated signal, reliabilities of y₀ and y₁ are higher thanreliabilities of y₂, y₃, y_(4,) and y₅.

The bits y₂ and y₃ are determined depending on whether a magnitude ofthe modulated symbol is greater or less than 4, and the bits y₄ and y₅are determined according to whether the magnitude of the modulatedsymbol is closer to 4 or 0, with 2 centered therebetween, or closer to 4or 8 with 6 centered. Accordingly, a range in which the magnitude isdetermined by y₂ and y₃ is 4, while a range for y₄ and y₅ is 2.Therefore, y₂ and y₃ is higher than y₄ and y₅ in reliability. As aresult, y₀=y₁>y₂=y₃>y₄=y₅ in terms of non-error occurrence probabilities(i.e., reliabilities) of the bits.

In 64-QAM modulation, of 6 bits constituting a signal, 2 bits determinesigns of the real part and imaginary part of the signal and 4 bits onlyneed to determine magnitudes of the real part and imaginary part of thesignal. Accordingly, orders of (y₀, y₁, y₂, y₃, y₄, y₅) and a role ofeach bit are subject to change. Even in a signal constellation of256-QAM or higher, the roles and reliabilities of bits constituting amodulation signal are different as described above. Accordingly, adetailed description thereof is to be omitted herein.

To summarize, in BPSK or QPSK modulation, it is not necessary toconsider a modulation scheme when determining shortening and puncturingpatterns because as reliabilities of bits included in a symbol areequal, reliabilities of codeword bits are also equal in an LDPC codewordthat has undergone shortening or puncturing. However, in high-ordermodulation such as 16-QAM, 64-QAM, and 256-QAM, because the roles andreliabilities of bits included in a symbol are different, when amodulation scheme and a signal constellation/bit mapping (bit mapping onthe signal constellation) scheme have been determined, reliability ofeach codeword bit in an LDPC codeword, after it undergoes shortening orpuncturing, may be different from that of the LDPC codeword before itundergoes shortening or puncturing.

Therefore, there is a demand for an apparatus and method for generatingan LDPC code using shortening or puncturing in consideration ofhigh-order modulation.

SUMMARY OF THE INVENTION

The present invention has been designed to address at least the problemsand/or disadvantages above and to provide at least the advantagesdescribed below. Accordingly, an aspect of an embodiment of the presentinvention is to provide a channel encoding/decoding method and apparatusfor generating, from a given LDPC code, an LDPC code with a differentcodeword length using shortening or puncturing determined inconsideration of high-order modulation, and encoding and decoding achannel using the generated LDPC code in a communication system.

Another aspect of an embodiment of the present invention is to provide achannel encoding/decoding method and apparatus for providing optimalperformance considering a DVB-S2 structure in a communication systemusing LDPC codes.

In accordance with an aspect of an embodiment of the present invention,a method is provided for encoding a channel in a communication systemusing a Low-Density Parity-Check (LDPC) code, in which a transmissionmodulation scheme for a symbol is determined, columns corresponding toan information word in a parity-check matrix of the LDPC code aregrouped into a plurality of column groups, the column groups areordered, a range of an information word desired to be obtained byshortening is determined, column group-by-column group shortening isperformed on the column groups in an order according to a shorteningpattern determined in consideration of the determined modulation schemebased on the range of the information word, and the shortenedinformation word is LDPC-encoded.

In accordance with another aspect of an embodiment of the presentinvention, an apparatus is provided for encoding a channel in acommunication system using a Low-Density Parity-Check (LDPC) code. Theapparatus includes a parity-check matrix extractor for determining atransmission modulation scheme for a symbol, grouping columnscorresponding to an information word in a parity-check matrix of theLDPC code into a plurality of column groups, and ordering the columngroups, a shortening pattern applier for determining a range of aninformation word desired to be obtained by shortening, and based on therange of the information word, performing column group-by-column groupshortening on the column groups in an order according to a shorteningpattern determined in consideration of the determined modulation scheme,and an LDPC encoder for LDPC-encoding the shortened information word.

In accordance with another aspect of an embodiment of the presentinvention, a method is provided for decoding a channel in acommunication system using a Low-Density Parity-Check (LDPC) code, inwhich a signal transmitted from a transmitter is demodulated, it isdetermined whether there is at least one shortened bit in thedemodulated signal, a position of the shortened information bit isdetermined by estimating information about a shortening pattern whenthere is at least one shortened bit, and data is decoded using thedetermined position of the shortened information bit. The informationabout the shortening pattern includes a shortening pattern determined inconsideration of a modulation scheme.

In accordance with another aspect of an embodiment of the presentinvention, there is provided an apparatus for decoding a channel in acommunication system using a Low-Density Parity-Check (LDPC) code. theapparatus includes a shortening pattern estimator for demodulating asignal transmitted from a transmitter, determining whether there is atleast one shortened bit in the demodulated signal, and when there is atleast one shortened bit, determining a position of the shortenedinformation bit by estimating information about a shortening pattern,and a decoder for decoding data using the determined position of theshortened information bit. The information about the shortening patternincludes a shortening pattern determined by consideration of amodulation scheme.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features, and advantages of certainembodiments of the present invention will be more apparent from thefollowing description taken in conjunction with the accompanyingdrawings, in which:

FIG. 1 illustrates an example of a parity-check matrix of a length-8LDPC code;

FIG. 2 illustrates a Tanner graph for a parity-check matrix of alength-8 LDPC code;

FIG. 3 illustrates a schematic structure of a DVB-S2 LDPC code;

FIG. 4 illustrates an example of a parity-check matrix of a DVB-S2 LDPCcode;

FIG. 5A schematically illustrates a signal constellation for aconventional QPSK modulation used in a digital communication system;

FIG. 5B schematically illustrating a signal constellation for aconventional 16-QAM modulation used in a digital communication system;

FIG. 5C schematically illustrates a signal constellation for aconventional 64-QAM modulation used in a digital communication system;

FIG. 6 is a block diagram of a transceiver in a communication systemusing an LDPC code;

FIG. 7A illustrates an example of signal constellation/bit mapping in16-QAM modulation;

FIG. 7B illustrates an example of signal constellation/bit mappingmodified by shortening in 16-QAM modulation;

FIG. 8A illustrates an example of signal constellation/bit mapping in64-QAM modulation;

FIG. 8B illustrates an example of signal constellation/bit mappingmodified by shortening in 64-QAM modulation;

FIG. 9 illustrates a procedure for generating an LDPC code with adifferent codeword length from a parity-check matrix of a stored LDPCcode according to an embodiment of the present invention;

FIG. 10 illustrates a block diagram of a transmission apparatus using aproposed shortened LDPC code according to an embodiment of the presentinvention;

FIG. 11 illustrates a block diagram of a transmission apparatus using aproposed shortened/punctured LDPC code according to an embodiment of thepresent invention;

FIG. 12 illustrates a block diagram of a reception apparatus using anLDPC code to which proposed shortening is applied, according to anembodiment of the present invention;

FIG. 13 illustrates a block diagram of a reception apparatus using anLDPC code to which proposed shortening and puncturing are both applied,according to an embodiment of the present invention; and

FIG. 14 illustrates a flowchart of a reception operation of a receptionapparatus according to an embodiment of the present invention.

Throughout the drawings, the same drawing reference numerals will beunderstood to refer to the same elements, features and structures.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

The following description with reference to the accompanying drawings isprovided to assist in a comprehensive understanding of the embodimentsof the invention as defined by the claims and their equivalents. Itincludes various specific details to assist in that understanding, butthese should not be construed as limitations. Accordingly, those ofordinary skill in the art will recognize that various changes andmodifications of the embodiments described herein can be made withoutdeparting from the scope and spirit of the present invention. Inaddition, descriptions of well-known functions and constructions areomitted for clarity and conciseness.

Further, the terms and words used in the following description andclaims are not limited to the bibliographical meanings, but, are used bythe inventor to enable a clear and consistent understanding of thepresent invention. Accordingly, it should be apparent to those skilledin the art that the following description of the embodiments of thepresent invention are provided for illustration purpose only and not forthe purpose of limiting the invention as defined by the appended claimsand their equivalents.

The following description of the embodiments of the present inventionprovides a method for supporting an LDPC code with various codewordlengths suitable for high-order modulation, using a parity-check matrixof a structured LDPC code with a particular form. In addition, thedescription of the embodiments of the present invention provides anapparatus for supporting various codeword lengths according tohigh-order modulation in a communication system using an LDPC code in aparticular form, and a method for controlling the same. In particular,the description of the embodiments of the present invention provides amethod for generating an LDPC code using a parity-check matrix of agiven LDPC code, the generated LDPC code being smaller than the givenLDPC code, and an apparatus thereof.

FIG. 6 is a block diagram of a transceiver in a communication systemusing an LDPC code.

Referring to FIG. 6, a message u is input to an LDPC encoder 611 in atransmitter 610 before being transmitted to a receiver 630. The LDPCencoder 611 encodes the input message u, and outputs the encoded signalc to a modulator 613. The modulator 613 modulates the encoded signal c,and transmits the modulated signal s to the receiver 630 over a wirelesschannel 620. A demodulator 631 in the receiver 630 demodulates thereceived signal r, and outputs the demodulated signal x to an LDPCdecoder 633. The LDPC decoder 633 decodes the demodulated signal x,resulting in an estimate u of the message based on the data receivedthrough the wireless channel 620.

The LDPC encoder 611 generates a parity-check matrix according to acodeword length required by a communication system, using a presetscheme. Particularly, in accordance with an embodiment of the presentinvention, an LDPC encoder will support various codeword lengths usingthe LDPC code without the separate need for additional storedinformation.

In accordance with an embodiment of the present invention, a method ofacquiring various codeword lengths from a given LDPC code usesshortening or puncturing. Methods that optimize performance by applyingshortening or puncturing to an LDPC code in accordance with a code rateor a codeword length are currently known. However, in most cases,because the known method of determining the shortening and puncturingpatterns performs the optimization process considering only Binary PhaseShift Keying (BPSK) or Quadrature Phase Shift Keying (QPSK), only oneoptimized shortening and/or puncturing pattern can exist for a givenLDPC code.

However, the puncturing and shortening patterns optimized when a signalconstellation/bit mapping scheme has been determined in high-ordermodulation can be different from those for BPSK or QPSK modulation.

In BPSK or QPSK modulation, because reliabilities of bits included in asymbol are equal, reliabilities of codeword bits in an LDPC codewordafter it undergoes shortening or puncturing are also equal.Consequently, there is no need to consider a modulation scheme in theprocess of determining the shortening and puncturing patterns. However,as described above, in high-order modulation such as 16-QAM, 64-QAM, and256-QAM, because reliabilities of bits included in a symbol aredifferent, when a modulation scheme and a signal constellation/bitmapping scheme have been determined, reliability of each codeword bit inan LDPC codeword after it undergoes shortening or puncturing may bedifferent from that of the LDPC codeword before it undergoes shorteningor puncturing.

FIGS. 7A and 7B and FIGS. 8A and 8B illustrate bit mapping examples inwhich bits are mapped to a symbol according to degrees of variable nodesin an LDPC codeword, for 16-QAM and 64-QAM, respectively. Morespecifically, FIG. 7A illustrates an example of signal constellation/bitmapping in 16-QAM modulation, and FIG. 7B illustrates an example ofsignal constellation/bit mapping modified by shortening in 16-QAMmodulation. For convenience, an LDPC codeword is divided herein into an8 or 12-bit partial block.

Referring to FIG. 7A, y₀ and y₁ indicate high-reliability bits thatdetermine signs of a real part and an imaginary part in a 16-QAM symbol,respectively. That is, reliability relationship between the bits arey₀=y₁>y₂=y₃. In FIG. 7A, because y₁ and y₃ are mapped to an LDPCcodeword bit part corresponding to the highest-degree variable nodes, ½of the highest-degree variable nodes are mapped to a high-reliabilitypart while the other ½ are connected to a low-reliability part.

Assuming that the half of the highest-degree variable nodes haveundergone shortening as illustrated in FIG. 7B, when symbol bitscorresponding to the non-shortened highest-degree variable node areconsidered in the shortened LDPC codeword, ⅞ of a highest-degreevariable node is mapped to y₃ and the other ⅛ is mapped to y₁. That is,the bit ratio is very different from that before the shortening.

Similarly, FIG. 8A illustrates an example of signal constellation/bitmapping in 64-QAM modulation, and FIG. 8B illustrates an example ofsignal constellation/bit mapping modified by shortening in 64-QAMmodulation.

In FIG. 8A, a reliability relationship between bits included in a symbolis y₀=y₁>y₂=y₃>y₄=y₅. In this case, it can be appreciated that ⅓ ofvariable nodes with the highest degree in the LDPC codeword are mappedto the lowest-reliability bit y₅. However, when ⅔ of the highest-degreevariable nodes undergo shortening as illustrated in FIG. 8B, it can beunderstood that ⅚ of the remaining non-shortened highest-degree variablenode is mapped to the lowest-reliability bit y₅, so that the bit ratiois different from that before the shortening.

When the high-order modulation scheme and the signal constellation/bitmapping scheme are fixed for a given LDPC code as described above, theshortening or puncturing pattern used in BPSK or QPSK modulation may notbe suitable because a ratio of the LDPC codeword bit being mapped toeach bit of a modulation symbol is very different according to theshortening technique.

It is also known that in the case of an LDPC code, degree distributionof a parity-check matrix of its optimized LDPC code is very differentaccording to the modulation scheme. That is, degree distribution of anLDPC code optimized for BPSK or QPSK modulation and degree distributionsof LDPC codes optimized for 16-QAM, 64-QAM, and 256-QAM are alldifferent.

For similar reasons, it is obvious that when it is assumed that an LDPCcode having one degree distribution is given, the optimized shorteningor puncturing pattern is different according to the high-ordermodulation scheme. Accordingly, a shortening pattern should bedetermined considering an intended modulation scheme in order to find anoptimized shortening or puncturing pattern of an LDPC code.

Shortening will be described below before a description of a method fordetermining a shortening or puncturing pattern in consideration of amodulation scheme is given. The term “shortening” as used herein refersto a method that does not substantially transmit a specified part of anLDPC codeword, after generating the LDPC codeword from a givenparticular parity-check matrix by performing LDPC encoding. For a betterunderstanding of shortening, a parity-check matrix of the DVB-S2 LDPCcode illustrated in FIG. 3 will be described in more detail below.

For the parity-check matrix of the DVB-S2 LDPC code illustrated in FIG.3, the total length is N₁, length-K₁ information bits (i₀,i₁, . . .,i_(K) ₁ ⁻¹) corresponds to a front part of the parity-check matrix, andlength-(N₁−K₁) parity bits (p₀,p₁, . . . ,p_(N) ₁ _(−K) ₁ ⁻¹)corresponds to a rear part of the parity-check matrix. Commonly,information bits freely have a value of 0 or 1, and the shorteningtechnique restricts values of information bits in a particular part thatis subject to shortening. For example, shortening N_(s) information bitsi₀ to i_(N) _(s) ⁻¹ commonly means that i₀=i₁=i_(N) _(s) ⁻¹=0. That is,by limiting values for N_(s) information bits i₀ through i_(N) _(s) ⁻¹,to 0, the shortening technique can obtain the same effect assubstantially not using N_(s) leading columns in the parity-check matrixof the DVB-S2 LDPC code illustrated in FIG. 3. The term “shortening”actually originates from the above-described limitation operation.Therefore, applying shortening herein also means considering values ofthe shortened information bits, as 0.

With respect to the shortening technique, when the system is set up, atransmitter and a receiver can share or generate the same positioninformation for the shortened information bits. Therefore, though thetransmitter has not transmitted the shortened bits, the receiver canperform decoding, already knowing that information bits in the positionscorresponding to the shortened bits have a value of 0.

In the shortening technique, because a length of a codeword that thetransmitter actually transmits is N₁−N_(s) and a length of aninformation word is K₁−N_(s), the code rate becomes(K₁−N_(s))/(N₁−N_(s)), which is always less than the first given coderate K₁/N₁.

Generally, a puncturing technique can be applied to both the informationbits and the parity bits. Although the puncturing technique and theshortening technique commonly reduce codeword lengths, the puncturingtechnique, unlike the shortening technique described above, does notlimit values of particular bits.

More specifically, the puncturing technique is simply a method for nottransmitting particular information bits or a particular part ofgenerated parity bits, such that a receiver can erase the correspondingbits. That is, by simply not transmitting bits in N_(p) predefinedpositions in a generated length-N₁ LDPC codeword, the puncturingtechnique obtains the same effect as that obtained by transmitting alength-(N₁−N_(p)) LDPC codeword. Because columns corresponding to thepunctured bits in the parity-check matrix are all used intact in adecoding process, the puncturing technique is distinct from theshortening technique.

Further, in accordance with an embodiment of the present invention,because position information for the punctured bits can be shared orestimated in common by the transmitter and the receiver when the systemis set up, the receiver may merely erase the corresponding puncturedbits, before decoding.

In the puncturing technique, because a length of a codeword that thetransmitter actually transmits is N₁-N_(p) and a length of aninformation word is constantly K₁, the code rate becomes K₁/(N₁−N_(p)),which is always greater than the first given code rate K₁/N₁.

A description will now be made of a shortening technique and apuncturing technique suitable for the DVB-S2 LDPC code. The DVB-S2 LDPCcode, as described above, is an LDPC code having a particular structure.Therefore, compared with the normal LDPC code, the DVB-S2 LDPC code isable to undergo more efficient shortening and puncturing.

For convenience of this example, it is assumed that the DVB-S2 LDPC codehas a codeword length and an information length are N₁ and K₁,respectively, and a codeword length and an information length of an LDPCcode that are desired to be finally obtained from the DVB-S2 LDPC codeusing the shortening technique and the puncturing technique are N₂ andK₂, respectively.

If a definition of N₁−N₂=N_(Δ) and K₁−K₂=K_(Δ) is given, it is possibleto generate the LDPC code whose codeword length and information lengthare N₂ and K₂, respectively, by shortening K_(Δ) bits and puncturing(N_(Δ)−K_(Δ)) bits from the parity-check matrix of the DVB-S2 LDPC code.For the generated LDPC code with N_(Δ)>0 or K_(Δ)>0, because its coderate

$\frac{K_{1} - K_{\Delta}}{N_{1} - N_{\Delta}}$

is generally different from the code rate K₁/N₁ of the DVB-S2 LDPC code,its algebraic characteristic changes. For N_(Δ)=K_(Δ), the LDPC code isgenerated by not performing shortening and puncturing or by performingonly shortening.

However, regarding the DVB-S2 LDPC code, as described in Rules 1 and 2,as one R_(i,j) ^((k))(k=1,2, . . . ,D_(i), i=1, . . . ,K₁/M₁, j=0, . . .,M₁−1) value corresponds to M₁ columns, a total of K₁/N₁ column groupseach have a structural shape. Therefore, the DVB-S2 LDPC code is equalto an LDPC code that does not use M₁ columns, if it does not use oneR_(i,j) ^((k)) value. The following shortening process, which will bedescribed with reference to FIG. 9, is proposed considering suchcharacteristics.

FIG. 9 illustrates a procedure for generating an LDPC code with adifferent codeword length from a parity-check matrix of a stored LDPCcode according to an embodiment of the present invention.

Referring to FIG. 9, an LDPC encoder determines a transmissionmodulation scheme for a symbol in step 901, and reads column groupinformation of a DVB-S2 LDPC code to be subjected to shortening in step903. That is, the LDPC encoder reads stored parity-check matrixinformation. Thereafter, the LDPC encoder determines a codeword lengthN₂ and an information length K₂ based on the column group information ofthe DVB-S2 LDPC code in step 905. Thereafter, the LDPC encoder performsa shortening process of steps 907 to 913, in which the LDPC encoderperforms shortening corresponding to a required information length of anLDPC code, based on the read information of the stored parity-checkmatrix.

Shortening Step 1: The LDPC encoder determines

$A = \lfloor \frac{K_{2}}{M_{1}} \rfloor$

in step 907, where └x┘ is a maximum integer which is less than or equalto x.

Shortening Step 2: The LDPC encoder selects a sequence for (A+1) columngroups from among R_(i,0) ^((k))(i=1, . . . ,K₁/M₁) column groups instep 909. The selected sequence is defined as S_(i,0) ^((k))(i=1, . . .,A+1). The LDPC encoder considers that there is no sequence for theremaining K₁/M₁−A−1 column groups except for the partial sequenceS_(i,0) ^((k)) in the sequence R_(i,0) ^((k)).

Shortening Step 3: The LDPC encoder determines positions of columngroups corresponding to an information word of the DVB-S2 LDPC code fromthe sequence S_(i,0) ^((k)) of (A+1) column groups selected inShortening Step 2, generating a shortened DVB-S2 LDPC code in step 911.It should be noted that the shortened LDPC code has an informationlength (A+1)M₁, which is always greater than or equal to K₂.

Shortening Step 4: The LDPC encoder additionally shortens (A+1)M₁−K₂columns from the shortened LDPC code generated in Shortening Step 3 instep 913.

In Shortening Step 4, the additional shortening is more easilyimplemented if the process is sequentially performed from the rear orthe front of the column group where the additional shortening isachieved.

As described above, an embodiment of the present invention applies anefficient shortening technique that does not use information on columngroups of the DVB-S2 LDPC code depending on the structural features ofthe DVB-S2 LDPC code, compared with a conventional bit-by-bit shorteningtechnique, which is commonly used for shortening of the DVB-S2 LDPCcode.

Selection criteria of a sequence for column groups can be summarized asfollows in Step 2 in the shortening process of the DVB-S2 LDPC code.

Criterion 1: The LDPC encoder selects a shortening pattern sequence forcolumn groups defined such that optimal degree distribution obtainableby considering a modulation scheme given for a normal LDPC code with acodeword length N₂ and an information length K₂ is as similar aspossible to degree distribution of a shortened LDPC code with a codewordlength N₂ and an information length K₂, obtained by performingshortening on a DVB-S2 LDPC code with a codeword length N₁ and aninformation length K₁.

Criterion 2: The LDPC encoder selects a shortening pattern sequence forcolumn groups defined to provide a code having the good cyclecharacteristic on the Tanner graph among the shortened codes selected inCriterion 1. In accordance with an embodiment of the present invention,regarding a criterion for a cycle characteristic, the LDPC encoderselects a sequence where the minimum-length cycle in the Tanner graph isas large as possible and the number of the minimum-length cycles is assmall possible.

The optimal degree distribution of the normal LDPC code in which themodulation scheme is considered, can be found out in Criterion 1 using adensity evolution analysis method, various implementations of which areknown in the art. However, because the process of determining the degreedistribution using the density evolution method is not essential to theunderstanding of the present invention, a detailed description thereofwill not be provided.

If the number of all possible (shortening pattern) sequences for thecolumn groups is not great, the LDPC encoder may select (shorteningpattern) sequence for the column group having the best performance byfully searching all the sequences regardless of Criterions 1 and 2.However, the selection criteria for column groups, applied in ShorteningStep 2 for the DVB-S2 LDPC code enable to efficiently select a(shortening pattern) by selecting an LDPC code satisfying the bothconditions when the number of all possible (shortening pattern)sequences for the column group is too large.

Criterion 1 and Criterion 2 are applied when N₂ and K₂ are fixed values.However, if values of N₂ and K₂ required in the system are varying, theshortening patterns optimized according to the value of K₂ may have nocorrelation. That is, when the values of N₂ and K₂ required in thesystem are varying, all of shortening patterns optimized according tothe value of K₂ should be stored separately, for optimized performance.

Therefore, for system efficiency, suboptimal shortening patterns can befound, as will be described below, when the values of N₂ and K₂ requiredin the system are varying.

Finding A Suboptimal Shortening Pattern Sequence

Assuming that selection of one column group is needed for shortening,because the number of selectable column groups is only one, it ispossible to select a column group having the best performance. Whenselection of two column groups is needed for shortening, one columngroup showing the best performance, together with the already selectedcolumn group, are selected from the remaining column groups. Similarly,when selection of i column groups is needed for shortening, one columngroup having the best performance, together with (i−1) column groupsselected in the previous step for shortening, are selected from theremaining column groups.

Though the above method cannot guarantee optimal selection for allcases, it has relatively stable performance from the shortening patternhaving one regular rule, regardless of the change in the value of K₂.Therefore, the above-described the method has advantages of relativelystable performance and easy storage of shortening patterns.

A DVB-S2 LDPC code having a total of G column groups corresponding toinformation bits will be described below by way of example. Assumingthat orders of column groups, which are subjected to shortening inaccordance with the method of determining shortening patterns are set asB₁, B₂, B₃, . . . , B_(X), when only the sequence meaning the orders ofthe column groups is stored, efficient shortening is possible for anarbitrary K₂ through Shortening Step 1 to Shortening Step 4.

In order to show an example of the difference between shorteningpatterns found according to respective modulation schemes using theabove methods, Table 1A and Table 1B below show shortening methods andshortening patterns suboptimized for BPSK/QPSK, 16-QAM, and 64-QAMmodulations with regard to a DVB-S2 LDPC code with a codeword lengthN₁=16200 and an information length K₁=7200.

TABLE 1A Major variables of DVB-S2 LDPC code N₁ = 16200, K₁ = 7200, M₁ =360, q = 25 Range of K₂ Shortening Method 1) 528 ≦ K₂ < 7200${{{For}\mspace{14mu} {an}\mspace{14mu} {integer}\mspace{14mu} m} = \lfloor \frac{7200 - K_{2}}{360} \rfloor},{{shorten}\mspace{14mu} {all}\mspace{14mu} {of}\mspace{14mu} m}$column groups corresponding to π(0)^(th), π(1)^(th), . . . , π(m-1)^(th)rows, and additionally shorten 7200-K₂-360m information bits from acolumn group corresponding to a π(m)^(th) row. Here, π indicates apermutation function that means a shortening pattern, and therelationships are shown at the bottom of the table. However, when a partof a column group correspond- ing to a π(18) = 19^(th) row is shortened,columns in the positions corresponding to 168 Bose-Chaudhuri-Hocquenghem (BCH) parity bits do not undergo shortening. 2) Shorten allcolumn groups corresponding to π(0)^(th), 168 ≦ K₂ < 528 π(1)^(th), . .. , π(17)^(th) rows, and shorten all columns except for columns in thepositions corresponding to 168 BCH parity bits from a column groupcorrespond- ing to a π(18) = 19^(th) row. Also, additionally shorten528-K₂ information bits from a column group cor- responding to a π(19) =0^(th) row.

TABLE 1B Relationship between permutation functions suboptimized onBPSK/QPSK π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 1514 13 12 11 4 10 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18)π(19) 9 8 3 2 7 6 5 1 19 0 Relationship between permutation functionssuboptimized on 16QAM π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(0)18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13) π(14) π(15) π(16)π(17) π(18) π(19) 3 9 2 8 7 6 1 5 19 0 Relationship between permutationfunctions suboptimized on 64QAM π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7)π(8) π(9) 4 3 18 17 2 16 15 14 13 12 π(10) π(11) π(12) π(13) π(14) π(15)π(16) π(17) π(18) π(19) 11 10 9 1 8 7 6 5 19 0

Referring to Table 1A and Table 1B, it can be appreciated that when alength of information bits to be shortened is determined, the shorteningmethod is performed through a predetermined process regardless of themodulation scheme, but the relationships between permutation functionsindicating optimized shortening patterns are all different according tomodulation schemes. That is, when the shortening method is appliedwithout considering the modulation scheme, significant performancedegradation may occur according to modulation schemes.

The suboptimized shortening patterns shown in Table 1B, found for theshortening method in Table 1A, may not be unique according to conditionsfor finding the shortening patterns. For example, several column groupsmay exist that show similar performance in the interim process describedabove, i.e., Finding A Suboptimal Shortening Pattern Sequence. In thiscase, because selection of the next column groups may differ accordingto selection of column groups, the suboptimized shortening patterns maynot be unique according to performance difference of the shorteningprocess. Actually, shortening patterns shown in Table 1C also provideexcellent performance, similar to the shortening method performanceshown in Table 1A.

TABLE 1C Relationship between permutation functions suboptimized onBPSK/QPSK (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 1615 14 13 12 11 4 10 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17)π(18) π(19) 9 8 3 2 7 6 5 1 19 0 Relationship between permutationfunctions suboptimized on 16QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6)π(7) π(8) π(0) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13)π(14) π(15) π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 19 0 Relationshipbetween permutation functions suboptimized on 64QAM (2) π(0) π(1) π(2)π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 4 15 14 13 12 3 11 π(10)π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 10 9 2 8 7 1 6 519 0

The bit mapping methods corresponding to the signal constellations usedin 16-QAM and 64-QAM modulations of Table 1C are the results obtained byapplying the same bit mapping methods as those illustrated in FIGS. 7A,7B, 8A, and 8B.

Referring back to FIG. 9, after step 913, when puncturing is needed, theLDPC encoder applies puncturing in the LDPC encoding process in step915. The puncturing method will now be described below.

Assuming that a codeword length and an information length of an LDPCcode are N₂ and K₂, respectively, that the invention desires to finallyobtain from the DVB-S2 LDPC code whose codeword length and informationlength are N₁ and K₁, respectively, using the shortening technique andthe puncturing technique, and that a definition of N₁−N₂=N_(Δ) andK₁−K₂=K_(Δ) is given, it is possible to generate the LDPC code having acodeword length and information length of N₂ and K₂, respectively, byshortening K_(Δ) bits and puncturing (N_(Δ)−K_(Δ)) bits from theparity-check matrix of the DVB-S2 LDPC code. For convenience, when it isassumed that the puncturing technique is applied only to the paritypart, there is a possible method for puncturing 1 bit from the paritypart every (N₁−K₁)/(N_(Δ)−K_(Δ)) bits because the parity length isN₁−K₁. However, various other puncturing methods are also available.

FIG. 10 illustrates a block diagram of a transmission apparatus using ashortened LDPC code according to an embodiment of the present invention.

Referring to FIG. 10, a transmission apparatus includes a controller1010, a shortening pattern applier 1020, an LDPC code parity-checkmatrix extractor 1040, and an LDPC encoder 1060. The LDPC codeparity-check matrix extractor 1040 extracts an LDPC code parity-checkmatrix that has undergone shortening. The LDPC code parity-check matrixcan be extracted using a memory, can be given in the transmissionapparatus, or can be generated in the transmission apparatus. Inaddition, the LDPC code parity-check matrix extractor 1040 determines atransmission modulation scheme for a transmission symbol, groups columnscorresponding to an information word in the parity-check matrix of theLDPC code into a plurality of column groups, and orders the columngroups.

The shortening pattern applier 1020 determines a range of an informationword it desires to obtain through shortening, and based on the range ofthe information word, performs column group-by-column group shorteningon the column groups in an order according to a shortening patterndetermined in consideration of the determined modulation scheme.

The controller 1010 controls the shortening pattern applier 1020 todetermine a shortening pattern according to the transmission modulationscheme and the information length, and the shortening pattern applier1020 inserts bits having a value of 0 in positions corresponding to theshortened bits, or removes columns corresponding to the shortened bitsfrom a parity-check matrix of a given LDPC code. The shortening patterncan be a shortening pattern stored in a memory, generated using asequence generator (not shown), or acquired using a density evolutionanalysis algorithm for a parity-check matrix and a given informationlength.

The LDPC encoder 1060 performs encoding based on the LDPC code shortenedby the controller 1010 and the shortening pattern applier 1020.

FIG. 11 illustrates a block diagram of a transmission apparatus for aDVB-S2 LDPC code using both shortening and puncturing. Morespecifically, the transmission apparatus of FIG. 11 also includes apuncturing pattern applier 1180 when compared to the transmissionapparatus of FIG. 10.

Referring to FIG. 11, shortening is performed at an input stage of theLDPC encoder 1060, and puncturing is performed at an output stage of theLDPC encoder 1060. The puncturing pattern applier 1180 appliespuncturing to an output of the LDPC encoder 1060. The method of applyingpuncturing has been described above in step 915 of FIG. 9.

FIG. 12 illustrates a block diagram of a reception apparatus using anLDPC code to which shortening is applied, according to an embodiment ofthe present invention. More specifically, FIG. 12 illustrates an exampleof a reception apparatus that receives a signal transmitted from acommunication system using the shortened DVB-S2 LDPC code, and recoversuser-desired data from the received signal when it detects atransmission modulation scheme and a length of the shortened DVB-S2 LDPCcode from the received signal.

Referring to FIG. 12, the reception apparatus includes a controller1210, a shortening pattern determination/estimation unit 1220, ademodulator 1230, and an LDPC decoder 1240. The demodulator 1230receives and demodulates a shortened LDPC code, and provides thedemodulated signal to the shortening pattern determination/estimationunit 1220 and the LDPC decoder 1240. The shortening patterndetermination/estimation unit 1220, under the control of the controller1210, estimates or determines information on a shortening pattern of anLDPC code from the demodulated signal, and provides position informationof the shortened bits to the LDPC decoder 1240. Determining orestimating the shortening patterns in the shortening patterndetermination/estimation unit 1220 can use shortening patterns stored ina memory, can generate shortening patterns using a sequence generator(not shown), or can obtain shortening patterns using a density evolutionanalysis algorithm for a parity-check matrix and a given informationlength.

The controller 1210 controls the shortening patterndetermination/estimation unit 1220 to deliver a shortening pattern tothe LDPC decoder 1240 depending on the modulation scheme and theinformation length. Because the probability that values of the shortenedbits will be zero is 1 (i.e., 100%), the LDPC decoder 1240 determineswhether or not it will allow the shortened bits to take part in itsdecoding operation depending on the value 1 of the probability that theshortened bits would be zero.

When the LDPC decoder 1240 receives information on a length of theDVB-S2 LDPC code shortened by the shortening patterndetermination/estimation unit 1220, it restores the user-desired datafrom the received signals.

FIG. 13 illustrates a block diagram of a reception apparatus using anLDPC code to which shortening and puncturing are applied, according toan embodiment of the present invention. More specifically, the receptionapparatus illustrated FIG. 13 includes a shortening/puncturing patterndetermination/estimation unit 1320 that replaces the shortening patterndetermination/estimation unit 1220 in the reception apparatusillustrated in FIG. 12.

Referring to FIG. 13, when both shortening and puncturing are applied inthe transmission apparatus, the shortening/puncturing patterndetermination/estimation unit 1320 in the reception apparatus mayperform pattern determination or estimation on the shortening first,perform pattern determination or estimation on the puncturing first, ormake pattern determination or estimation on both the shortening andpuncturing.

The LDPC decoder 1240 should have information about both shortening andpuncturing to perform decoding.

FIG. 14 illustrates a flowchart of a reception operation of a receptionapparatus according to an embodiment of the present invention.

Referring to FIG. 14, a demodulator 1230 receives and demodulates ashortened LDPC code in step 1401. In step 1403, a shortening patterndetermination/estimation unit 1220 determines or estimatesshortening/puncturing patterns from the demodulated signal.

The shortening pattern determination/estimation unit 1220 determines instep 1405 whether there are any shortened or punctured bits. If thereare no shortened or punctured bits, an LDPC decoder 1240 performsdecoding in step 1411. However, if there are shortened or puncturedbits, the shortening pattern determination/estimation unit 1220 deliversposition information of the shortened/punctured bits to the LDPC decoder1240 in step 1407.

In step 1409, based on the position information of theshortened/punctured bits, the LDPC decoder 1240 determines that theprobability that values of the shortened bits will be 0 is 1, anddetermines that the punctured bits are erased bits. Thereafter, the LDPCdecoder 1240 performs LDPC decoding in step 1411.

As is apparent from the foregoing description, the embodiments of thepresent invention can generate a separate LDPC code with a differentcodeword length using information on the parity-check matrix given inthe communication system that uses high-order modulation and an LDPCcode.

In addition, the embodiments of the present invention can performshortening using different shortening patterns according to modulationschemes.

While the present invention has been shown and described with referenceto certain embodiments thereof, it will be understood by those skilledin the art that various changes in form and details may be made thereinwithout departing from the spirit and scope of the present invention asdefined by the appended claims.

1. A method for encoding a channel using a Low-Density Parity-Check(LDPC) code in a communication system including a parity-check matrixextractor, a shortening pattern applier, and an LDPC encoder, the methodcomprising: determining a modulation scheme for transmitting a symbol;determining a shortening pattern in consideration of the determinedmodulation scheme; grouping columns corresponding to an information wordin a parity-check matrix of the LDPC code into a plurality of columngroups; ordering the column groups; determining a range of a resultinginformation word desired to be obtained by shortening the informationword; based on the range of the resulting information word, performing,column group-by-column group shortening on the ordered column groups ofthe information word, according to the determined shortening pattern;and LDPC-encoding the shortened information word.
 2. The method of claim1, wherein reliabilities of bits included in a modulation symbol and adegree of a variable node are considered in determining the shorteningpattern.
 3. The method of claim 1, wherein when the LDPC code has acodeword length of 16200 and an information length of 7200 shortening isperformed using one of a plurality of shortening patterns as shownbelow: Relationship between permutation functions suboptimized onBPSK/QPSK (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 1615 14 13 12 11 4 10 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17)π(18) π(19) 9 8 3 2 7 6 5 1 19 0 Relationship between permutationfunctions suboptimized on 16QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6)π(7) π(8) π(0) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13)π(14) π(15) π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 19 0 Relationshipbetween permutation functions suboptimized on 64QAM (2) π(0) π(1) π(2)π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 4 15 14 13 12 3 11 π(10)π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 10 9 2 8 7 1 6 519 0

where π denotes a permutation function indicating the shorteningpattern.
 4. The method of claim 1, wherein when the modulation scheme is16-QAM, a codeword length is 16200 and an information length is 7200, asequence of shortened information column groups is 18, 17, 16, 15, 14,13, 12, 11, 4, 10, 9, 8, 7, 3, 2, 1, 6, 5, 19, and
 0. 5. The method ofclaim 1, wherein when the modulation scheme is 64-QAM, a codeword lengthis 16200 and an information length is 7200, a sequence of shortenedinformation column groups is 18, 17, 16, 4, 15, 14, 13, 12, 3, 11, 10,9, 2, 8, 7, 1, 6, 5, 19, and
 0. 6. The method of claim 1, furthercomprising: performing, shortening additional columns from the shortenedLDPC code when resulting information word is not equal to theinformation word shortened by column group-by column group shortening.7. The method of claim 6, further comprising: the additional shorteningis performed from the rear or the front of the column group where theadditional shortening is achieved.
 8. A method for encoding a channelusing a Low-Density Parity-Check (LDPC) code in a communication systemincluding a parity-check matrix extractor, a shortening pattern applier,and an LDPC encoder, the method comprising: performing, by theshortening pattern applier, column group-by-column group shorteningaccording to the shortening patterns as shown below, wherein when themodulation scheme is 16QAM: π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8)π(0) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13) π(14) π(15)π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 19 0

where π denotes a permutation function.
 9. The method of claim 8,wherein reliabilities of bits included in a modulation symbol and adegree of a variable node are considered in determining the shorteningpattern.
 10. A method for encoding a channel using a Low-DensityParity-Check (LDPC) code in a communication system including aparity-check matrix extractor, a shortening pattern applier, and an LDPCencoder, the method comprising: performing, by the shortening patternapplier, column group-by-column group shortening according to theshortening patterns as shown below, wherein when the modulation schemeis 64QAM: π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 415 14 13 12 3 11 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18)π(19) 10 9 2 8 7 1 6 5 19 0

where π denotes a permutation function.
 11. The method of claim 10,wherein reliabilities of bits included in a modulation symbol and adegree of a variable node are considered in determining the shorteningpattern.
 12. An apparatus for encoding a channel in a communicationsystem using a Low-Density Parity-Check (LDPC) code, the apparatuscomprising: a parity-check matrix extractor for extracting the LDPCparity-check matrix for shortening; a shortening pattern applier forbased on the range of a resulting information word, performing columngroup-by-column group shortening on the ordered column groups of theinformation word according to a shortening pattern determined inconsideration of the determined modulation scheme; and an LDPC encoderfor LDPC-encoding the shortened information word.
 13. The apparatus ofclaim 12, wherein reliabilities of bits included in a modulation symboland a degree of a variable node are considered in determining theshortening pattern.
 14. The apparatus of claim 12, wherein when the LDPCcode has a codeword length of 16200 and an information length of 7200the shortening pattern is determined from one of a plurality ofshortening patterns as defined by: Relationship between permutationfunctions suboptimized on BPSK/QPSK (2) π(0) π(1) π(2) π(3) π(4) π(5)π(6) π(7) π(8) π(9) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13)π(14) π(15) π(16) π(17) π(18) π(19) 9 8 3 2 7 6 5 1 19 0 Relationshipbetween permutation functions suboptimized on 16QAM (2) π(0) π(1) π(2)π(3) π(4) π(5) π(6) π(7) π(8) π(0) 18 17 16 15 14 13 12 11 4 10 π(10)π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 190 Relationship between permutation functions suboptimized on 64QAM (2)π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 4 15 14 13 123 11 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 10 9 28 7 1 6 5 19 0

where π denotes a permutation function that indicates the shorteningpattern.
 15. The apparatus of claim 12, wherein when the modulationscheme is 16-QAM, a codeword length is 16200 and an information lengthis 7200, a sequence of shortened information column groups is 18, 17,16, 15, 14, 13, 12, 11, 4, 10, 9, 8, 7, 3, 2, 1, 6, 5, 19, and
 0. 16.The apparatus of claim 12, wherein when the modulation scheme is 64-QAM,a codeword length is 16200 and an information length is 7200, a sequenceof shortened information column groups is 18, 17, 16, 4, 15, 14, 13, 12,3, 11, 10, 9, 2, 8, 7, 1, 6, 5, 19, and
 0. 17. The apparatus of claim12, wherein the shortening pattern applier performs shorteningadditional columns from the shortened LDPC code when resultinginformation word is not equal to the information word shortened bycolumn group-by column group shortening.
 18. The apparatus of claim 12,wherein the additional shortening is performed from the rear or thefront of the column group where the additional shortening is achieved.19. An apparatus for encoding a channel using a Low-Density Parity-Check(LDPC) code in a communication system including a parity-check matrixextractor, a shortening pattern applier, and an LDPC encoder, theapparatus comprising: the shortening pattern applier for performingcolumn group-by-column group shortening according to the shorteningpatterns as shown below, wherein when the modulation scheme is 16QAM:π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(0) 18 17 16 15 14 13 1211 4 10 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 9 87 3 2 1 6 5 19 0

where π denotes a permutation function.
 20. An apparatus for encoding achannel in a communication system using a Low-Density Parity-Check(LDPC) code, the apparatus comprising:
 20. An apparatus for encoding achannel in a communication system using a Low-Density Parity-Check(LDPC) code, the apparatus comprising: a parity-check matrix extractorfor determining a modulation scheme for transmitting a symbol, groupingcolumns corresponding to an information word in a parity-check matrix ofthe LDPC code into a plurality of column groups, and ordering the columngroups; a shortening pattern applier for determining a range of aresulting information word desired to be obtained by shortening theinformation word, and based on the range of the resulting informationword, performing column group-by-column group shortening on the orderedcolumn groups of the information word according to a shortening patterndetermined in consideration of the determined modulation scheme; and anLDPC encoder for LDPC-encoding the shortened information word; whereinwhen the modulation scheme is 64-QAM, a codeword length is 16200, and aninformation length is 7200, the shortening pattern defined by:Relationship between permutation functions suboptimized on 64QAM (2)π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 4 15 14 13 123 11 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 10 9 28 7 1 6 5 19 0

where π denotes a permutation function that indicates the shorteningpattern.
 21. A method for encoding a channel using a Low-DensityParity-Check (LDPC) code in a communication system including aparity-check matrix extractor, a shortening pattern applier, and an LDPCencoder, the method comprising: determining a modulation scheme for atransmission symbol; performing shortening on an information word in aparity-check matrix of the LDPC code using a different shorteningpattern according to the determined modulation scheme; and LDPC-encodingthe shortened information word; wherein the different shortening patternincludes shortening patterns defined by: Relationship betweenpermutation functions suboptimized on BPSK/QPSK (2) π(0) π(1) π(2) π(3)π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 15 14 13 12 11 4 10 π(10) π(11)π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 9 8 3 2 7 6 5 1 19 0Relationship between permutation functions suboptimized on 16QAM (2)π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(0) 18 17 16 15 14 13 1211 4 10 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 9 87 3 2 1 6 5 19 0 Relationship between permutation functions suboptimizedon 64QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 164 15 14 13 12 3 11 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18)π(19) 10 9 2 8 7 1 6 5 19 0

where π denotes a permutation function that indicates the shorteningpattern.
 22. The method of claim 21, wherein reliabilities of bitsincluded in a modulation symbol and a degree of a variable node areconsidered in determining the shortening pattern.
 23. The method ofclaim 21, wherein when the modulation scheme is 16-QAM, a codewordlength is 16200, and an information length is 7200, a sequence ofshortened information column groups is 18, 17, 16, 15, 14, 13, 12, 11,4, 10, 9, 8, 7, 3, 2, 1, 6, 5, 19, and
 0. 24. The method of claim 21,wherein when the modulation scheme is 64-QAM, a codeword length is16200, and an information length is 7200, a sequence of shortenedinformation column groups is 18, 17, 16, 4, 15, 14, 13, 12, 3, 11, 10,9, 2, 8, 7, 1, 6, 5, 19, and
 0. 25. A method for decoding a channelusing a Low-Density Parity-Check (LDPC) code in a communication systemincluding a shortening pattern estimator and a decoder, the methodcomprising: demodulating a signal transmitted from a transmitter;determining whether there is at least one shortened bit in thedemodulated signal; when there is at least one shortened bit,determining a position of the at least one shortened bit by estimatinginformation about a shortening pattern; and decoding data using thedetermined position of the shortened bit; wherein the shortening patternis determined in consideration of a modulation scheme.
 26. The method ofclaim 25, wherein reliabilities of bits included in a modulation symboland a degree of a variable node are considered in determining theshortening pattern.
 27. The method of claim 25, wherein when themodulation scheme is 16-QAM, a codeword length is 16200, and aninformation length is 7200, position values of shortened informationbits include 18, 17, 16, 15, 14, 13, 12, 11, 4, 10, 9, 8, 7, 3, 2, 1, 6,5, 19, and
 0. 28. The method of claim 25, wherein the modulation schemeis 64-QAM, a codeword length is 16200, and an information length is7200, position values of shortened information bits include 18, 17, 16,4, 15, 14, 13, 12, 3, 11, 10, 9, 2, 8, 7, 1, 6, 5, 19, and
 0. 29. Amethod for decoding a channel using a Low-Density Parity-Check (LDPC)code in a communication system including a shortening pattern estimatorand a decoder, the method comprising: decoding, by the decoder, datausing the determined position of the shortened bit based on a shorteningpattern; wherein the shortening pattern is determined in considerationof a modulation scheme, and when the modulation scheme is 16-QAM, acodeword length is 16200, and an information length is 7200, theshortening pattern is defined by: Relationship between permutationfunctions suboptimized on 16QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6)π(7) π(8) π(0) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13)π(14) π(15) π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 19 0

where π denotes a permutation function.
 30. A method for decoding achannel using a Low-Density Parity-Check (LDPC) code in a communicationsystem including a shortening pattern estimator and a decoder, themethod comprising: decoding, by the decoder, data using the determinedposition of the shortened bit based on a shortening pattern; wherein theshortening pattern is determined in consideration of a modulationscheme, and when the modulation scheme is 64-QAM, a codeword length is16200, and an information length is 7200, the shortening pattern isdefined by: Relationship between permutation functions suboptimized on64QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 415 14 13 12 3 11 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18)π(19) 10 9 2 8 7 1 6 5 19 0

where π denotes a permutation.
 31. An apparatus for decoding a channelin a communication system using a Low-Density Parity-Check (LDPC) code,the apparatus comprising: a shortening pattern estimator for determininga position of the at least one shortened bit by estimating informationabout a shortening pattern; and a decoder for decoding data using thedetermined position of the shortened bit; wherein the shortening patternis determined in consideration of a modulation scheme.
 32. The apparatusof claim 31, wherein reliabilities of bits included in a modulationsymbol and a degree of a variable node are considered in determining theshortening pattern.
 33. The apparatus of claim 31, wherein when the LDPCcode has a codeword length of 16200 and an information length of 7200,the shortening pattern is selected from a plurality of differentshortening patterns defined by: Relationship between permutationfunctions suboptimized on BPSK/QPSK (2) π(0) π(1) π(2) π(3) π(4) π(5)π(6) π(7) π(8) π(9) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13)π(14) π(15) π(16) π(17) π(18) π(19) 9 8 3 2 7 6 5 1 19 0 Relationshipbetween permutation functions suboptimized on 16QAM (2) π(0) π(1) π(2)π(3) π(4) π(5) π(6) π(7) π(8) π(0) 18 17 16 15 14 13 12 11 4 10 π(10)π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 190 Relationship between permutation functions suboptimized on 64QAM (2)π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8) π(9) 18 17 16 4 15 14 13 123 11 π(10) π(11) π(12) π(13) π(14) π(15) π(16) π(17) π(18) π(19) 10 9 28 7 1 6 5 19 0

where π denotes a permutation function that indicates the shorteningpattern.
 34. The apparatus of claim 31, wherein when the modulationscheme is 16-QAM, a codeword length is 16200, and an information lengthis 7200, position values of shortened information bits comprise 18, 17,16, 15, 14, 13, 12, 11, 4, 10, 9, 8, 7, 3, 2, 1, 6, 5, 19, and
 0. 35.The apparatus of claim 31, wherein the modulation scheme is 64-QAM, acodeword length is 16200, and an information length is 7200, positionvalues of shortened information bits comprise 18, 17, 16, 4, 15, 14, 13,12, 3, 11, 10, 9, 2, 8, 7, 1, 6, 5, 19, and
 0. 36. An apparatus fordecoding a channel in a communication system using a Low-DensityParity-Check (LDPC) code, the apparatus comprising: a decoder fordecoding data using the determined position of the shortened bit basedon a shortening pattern; wherein the shortening pattern determined inconsideration of a modulation scheme, and when the modulation scheme is16-QAM, a codeword length is 16200, and an information length is 7200,the shortening pattern defined by: Relationship between permutationfunctions suboptimized on 16QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6)π(7) π(8) π(0) 18 17 16 15 14 13 12 11 4 10 π(10) π(11) π(12) π(13)π(14) π(15) π(16) π(17) π(18) π(19) 9 8 7 3 2 1 6 5 19 0

where π denotes a permutation function.
 37. An apparatus for decoding achannel in a communication system using a Low-Density Parity-Check(LDPC) code, the apparatus comprising: a decoder for decoding data usingthe determined position of the shortened bit based on a shorteningpattern; wherein the shortening pattern determined in consideration of amodulation scheme, and when the modulation scheme is 64-QAM, a codewordlength is 16200, and an information length is 7200, the shorteningpattern defined by: Relationship between permutation functionssuboptimized on 64QAM (2) π(0) π(1) π(2) π(3) π(4) π(5) π(6) π(7) π(8)π(9) 18 17 16 4 15 14 13 12 3 11 π(10) π(11) π(12) π(13) π(14) π(15)π(16) π(17) π(18) π(19) 10 9 2 8 7 1 6 5 19 0

where π denotes a permutation function.